rev.1.01, apr.26.2 004, page 1 of 8 HD151TS302BST spread spectrum clock for emi solution rej03d0215?0101z preliminary rev.1.01 apr.26.2004 description the HD151TS302BST is a high-performance spread spectrum clock modulator. it is suitable for low emi solution. features ? supports 10 mhz to 60 mhz operation (designed for xin = 48 mhz) ? 1 copy of clock out with spread spectrum modulation @3.3 v ? programmable spread spectrum modulation (?1.0%, ?3.0% down spread modulation.) ? output enable function tri-state output key specifications ? supply voltages : vdd = 3.3 v0.165 v ? clock output duty cycle = 505% ? cycle to cycle jitter = 250 ps typ. ? output slew rate = 0.8v/ns min.
HD151TS302BST rev.1.01, apr.26.2 004, page 2 of 8 block diagram synthesizer mode control 1/n osc ssc modulator vdd nc sscclkout gnd sel0 xin xout oe 1/m r=100 k ? r=100 k ? r=1 m ? c l =8 pf c l =8 pf pin arrangement (top view) 8 oe 1 7 nc 6 sel0 5 xout sscclkout 2 vdd 3 gnd 4 xin ssc function table oe: sel0 spread percentage 0 0 hi?z 0 1 hi?z 1 0 ?1.0% 1 1 ?3.0% note: ?3.0% ssc is selected for default by internal pull-up resistors.
HD151TS302BST rev.1.01, apr.26.2 004, page 3 of 8 clock frequency table xin(mhz) sscclkout(mhz) 48 48* 1 24 24* 1 notes: 1. with spread spectrum modulation. pin descriptions pin name no. type description gnd 3 ground gnd pin vdd 2 power power supplies pin. normally 3.3 v. nc 7 nc don?t connect any vdd or gnd. sscclkout 1 output spread spectrum modulated clock output. xin 4 input oscillator input. xout 5 output oscillator output. sel0 6 input ssc mode select pin. lvcmos level input. pull-up by internal resistor. (100 k ? ). oe 8 input output enable. tri-state output when low. pull?up by internal resistor (100 k ? ). absolute maximum ratings item symbol ratings unit conditions supply voltage vdd ?0.5 to 4.6 v input voltage v i ?0.5 to 4.6 v output voltage *1 v o ?0.5 to vdd+0.5 v input clamp current i ik ?50 ma v i < 0 output clamp current i ok ?50 ma v o < 0 continuous output current i o 50 ma v o = 0 to vdd maximum power dissipation at ta = 55c (in still air) 0.7 w storage temperature t stg ?65 to +150 c notes: stresses beyond those listed under ?absolute maxi mum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating conditions? is not implied. exposure to absolute maximum rated conditions for extended periods may affect device reliability. 1. the input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. recommended operating conditions item symbol min typ max unit conditions supply voltage vdd 3.135 3.3 3.465 v dc input signal voltage ?0.3 ? vdd+0.3 v high level input voltage v ih 2.0 ? vdd+0.3 v low level input voltage v il ?0.3 ? 0.8 v input clock duty cycle 45 50 55 %
HD151TS302BST rev.1.01, apr.26.2 004, page 4 of 8 dc electrical characteristics ta = 25c, vdd = 3.3 v item symbol min typ max unit test conditions input low voltage v il ??0.8v input high voltage v ih 2.0 ? ? v ??10av i = 0 v or 3.465 v, vdd = 3.465 v, xin pin input current i i ??100 v i = 0 v or 3.465 v, vdd = 3.465 v, sel0, oe pins input capacitance c i ? 4 pf sel0, oe load capacitance* 1 c l ? 4 ? pf between pin xin and xout operating current ? 7 ? ma xin = 24 mhz, c l = 0 pf, vdd = 3.3 v note: 1. pin xin and xout each has an 8 pf capacitance. when used with a crystal, the two capacitors combined load the crystal with 4 pf. if driving xin with a reference clock signal, the load capacitance will be 8pf (typical). dc electrical characteristics / ssc clock output ta = 25c, vdd = 3.3 v item symbol min typ max unit test conditions v oh 3.1 ? ? v i oh = ?1 ma, vdd = 3.3 v output voltage v ol ??50mvi ol = 1 ma, vdd = 3.3 v i oh ? ?30 ? v oh = 1.5 v output current i ol ?30? ma v ol = 1.5 v
HD151TS302BST rev.1.01, apr.26.2 004, page 5 of 8 ac electrical characterist ics / ssc clock output [reference value] ta = 25c, vdd = 3.3 v, c l = 15 pf item symbol min typ max unit test conditions notes ? | 250 | | 300 | sscclkout, 24 mhz cycle to cycle jitter *1, 2 t ccs ? | 250 | | 300 | ps sscclkout, 48 mhz ssc = ?3.0% sel0 = 1 fig1 23.1 ? 24.2 sscclkout, xin = 24 mhz output frequency *1, 2 45.9 ? 48.7 mhz sscclkout, xin = 48 mhz ssc = ?3.0% sel0 = 1 slew rate *1 t sl 0.8 ? ? v/ns @48 mhz 0.4 v to 2.4 v clock duty cycle *1 45 50 55 % output impedance *1 ?40? ? spread spectrum modulation frequency *1 ?33?khz @48 mhz sscclkout input clock frequency 10 ? 60 mhz stabilization time *1,3 ??2 ms output enable/disable time* 1,4 t pz ? ? 100 ns notes: 1. parameters are target of desi gn. not 100% tested in production. 2. cycle to cycle jitter and output frequency are included spread spectrum modulation. 3. stabilization time is the time required for the integrat ed circuit to obtain phase lock of its input signal after power up. 4. output enable/disable time is the time required for the integrated circuit to obtain output signal after the oe pin input. sscclkout (or clkout) tcycle n t = (tcycle n) - (tcycle n+1) ccs tcycle n+1 figure 1 cycle to cycle jitter sscclkout oe v ih v il t pz t pz figure 2 output enable/disable time
HD151TS302BST rev.1.01, apr.26.2 004, page 6 of 8 application information 1. recommended circuit configuration the power supply circuit of the optimal performance on the application of a system should refer to fig. 3. vdd decoupling is important to both reduce jitter and emi radiation. the c1 decoupling capacitor s hould be placed, as close to the vdd pin as possible, otherwise the increased trace inductance will negate its decoupling capability. the c2 decoupling capacitor shown should be a tantalum type. 8oe nc 1 7 6 sel0 5 sscclkout 2 vdd 3 gnd gnd gnd 4 xin xout c1 r1 c2 ts300 series (crystal or reference input) (crystal or not connection) notes: c1 = high frequency supply decoupling capacitor. (0.1 f recommended) c2 = low frequency supply decoupling capacitor. (22 f tantalum type recommended) r1 = match value to line impedance. (22 ? reference value) figure 3 recommended circuit configuration
HD151TS302BST rev.1.01, apr.26.2 004, page 7 of 8 2. example board layout configuration 8 1 7 6 5 3 4 crystal connection or reference input crystal connection or not connection sscclkout r1 g p g g 0.1 f 22 f fb vdd (+3.3 v supply) g note: via to gnd plane r1 = match value to line impedance. fb = ferrite bead. (22 ? reference value) figure 4 example board layout
HD151TS302BST rev.1.01, apr.26.2 004, page 8 of 8 3. example of ts300 emi solution ic?s application ts30x t s 3 0 x system bus s y s t e m b u s memory m e m o r y graphics g r a p h i c s system cont. s y s t e m c o n t . ssc s s c clkout c l k o u t spread spectrum s p r e a d s p e c t r u m modulated clock m o d u l a t e d c l o c k cpu & asic c p u & a s i c xtal x t a l ref. r e f . clock c l o c k xin x i n xout x o u t 3.3 v cmos level ref. clock 3 . 3 v c m o s l e v e l r e f . c l o c k fig 5 ref. clock input example ts30x t s 3 0 x system bus s y s t e m b u s memory m e m o r y graphics g r a p h i c s system cont. s y s t e m c o n t . ssc s s c clkout c l k o u t spread spectrum s p r e a d s p e c t r u m modulated clock m o d u l a t e d c l o c k cpu & asic c p u & a s i c xin x i n xout x o u t xtal x t a l fig 6 xtal ref. clock input example
keep safety first in your circuit designs! 1. renesas technology corp. puts the maximum effort into making semiconductor products better and more reliable, but there is a lways the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placeme nt of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. notes regarding these materials 1. these materials are intended as a reference to assist our customers in the selection of the renesas technology corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to renesas t echnology corp. or a third party. 2. renesas technology corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents i nformation on products at the time of publication of these materials, and are subject to change by renesas technology corp. without notice due to product improvement s or other reasons. it is therefore recommended that customers contact renesas technology corp. or an authorized renesas technology corp. product distrib utor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. renesas technology corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies o r errors. please also pay attention to information published by renesas technology corp. by various means, including the renesas techn ology corp. semiconductor home page (http://www.renesas.com). 4. when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, a nd algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. renesas technology corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. renesas technology corp. semiconductors are not designed or manufactured for use in a device or system that is used under ci rcumstances in which human life is potentially at stake. please contact renesas technology corp. or an authorized renesas technology corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerosp ace, nuclear, or undersea repeater use. 6. the prior written approval of renesas technology corp. is necessary to reprint or reproduce in whole or in part these materi als. 7. if these products or technologies are subject to the japanese export control restrictions, they must be exported under a lic ense from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. 8. please contact renesas technology corp. for further details on these materials or the products contained therein. sales strategic planning div. nippon bldg., 2-6-2, ohte-machi, chiyoda-ku, tokyo 100-0004, japan http://www.renesas.co m renesas technology america, inc. 450 holger way, san jose, ca 95134-1368, u.s.a tel: <1> (408) 382-7500 fax: <1> (408) 382-7501 renesas technology europe limited. dukes meadow, millboard road, bourne end, buckinghamshire, sl8 5fh, united kingdom tel: <44> (1628) 585 100, fax: <44> (1628) 585 900 renesas technology europe gmbh dornacher str. 3, d-85622 feldkirchen, germany tel: <49> (89) 380 70 0, fax: <49> (89) 929 30 11 renesas technology hong kong ltd. 7/f., north tower, world finance centre, harbour city, canton road, hong kong tel: <852> 2265-6688, fax: <852> 2375-6836 renesas technology taiwan co., ltd. fl 10, #99, fu-hsing n. rd., taipei, taiwan tel: <886> (2) 2715-2888, fax: <886> (2) 2713-2999 renesas technology (shanghai) co., ltd. 26/f., ruijin building, no.205 maoming road (s), shanghai 200020, china tel: <86> (21) 6472-1001, fax: <86> (21) 6415-2952 renesas technology singapore pte. ltd. 1, harbour front avenue, #06-10, keppel bay tower, singapore 098632 tel: <65> 6213-0200, fax: <65> 6278-8001 renesas sales offices ? 2004. renesas technology corp., all rights reserved. printed in japan. c olophon .1 .0
|
